Serial EEPROM control through FPGA

VHDL programming is now widely used programming language for FPGA and other ROMS and this project report emphasis on how to learn VHDL programming. VHDL started out as a specification & a modeling language, with the first simulators being developed in the late 1980. A few tools complied with the full VHDL standard at the end of the decade & design with VHDL came a few years later. All the major tool manufacturers now support the VHDL standard. You can also Subscribe to FINAL YEAR PROJECT'S by Email for more such projects and seminar.



There are two main objective of this project. First is to learn programming in VHDL and get acquainted with its capabilities and uses and secondly serial EEPROM control through FPGA using I2C standard.

VHDL is acronym for VHSIC Hardware Description Language (VHSIC is an acronym for Very High Speed Integrated Circuits). It is a hardware description language that can be used to model a digital system at many levels of abstraction, ranging from the algorithmic level to gate level.

This project report includes VHDL program for EEPROM write operation and VHDL program for EEPROM read operation. Use this project report for your reference and study work only.

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